A liquid crystal display device (LCD), featured by thin thickness, light weight and low power consumption has recently come into widespread use, and is being predominantly employed as a display unit of mobile equipments, such as a portable telephone set (mobile phones or cellular phones), or a PDA (Personal Digital Assistants) or a notebook personal computer. In these days, with the progress in the technique for increasing a viewing area and for coping with moving images, the LCD display is now usable not only for mobile equipment but also for a stationary large screen display device and for a large screen size liquid crystal television set. A liquid crystal display device of an active matrix driving system is in use. As a thin type display device, a display device of the active matrix driving system employing an organic light emitting diode (OLED) also has been developed.
Referring to FIGS. 12A to 12C, a typical configuration of a thin type display device of the active matrix driving system (a liquid crystal display device and an organic light emitting diode display device) will be briefly described. FIG. 12A is a block diagram showing essential portions of the thin type display device. FIG. 12B is a schematic view showing essential portions of a unit pixel of a display device panel of a liquid crystal display device. FIG. 12C is a schematic view showing essential portions of a unit pixel of a display device panel of an organic light emitting diode display device. In FIGS. 12B and 12C, a unit pixel is schematically shown as an equivalent circuit.
Referring to FIG. 12A, the thin type display device of the active matrix driving system includes, as its typical components, a power supply circuit 940, a display controller 950, a display panel 960, a gate driver 970 and a data driver 980. The display device panel 960 includes a matrix array of unit pixels each comprising a pixel switch 964 and a display element 963. In the case of a color SXGA (Super eXtended Graphics Array) panel, for example, the matrix array is made up by 1280×3 pixel columns and 1024 pixel rows. On the display device panel 960, a plurality of scan lines 961 that transmit scan signals output from the gate driver 970 to the respective unit pixels and a plurality of data lines 962 that transmit gray scale voltage signals output from the data driver 980 are arrayed in a lattice-shaped configuration. The gate driver 970 and the data driver 980 are supplied with a clock signal CLK and control signals under control by the display device controller 950. Image data are supplied to the data driver 980. Nowadays, image data are predominantly digital data. A power supply circuit 940 supplies necessary power supply voltages to the gate driver 970 and the data driver 980. The display device panel 960 includes a semiconductor substrate. As the display device panel 960 for a large display device, a semiconductor substrate formed by an insulating substrate, having a plurality of thin film transistors (pixel switches) formed thereon, has been widely used.
In the display device of FIG. 12A, the pixel switch 964 is turned on (made electrically conductive) and off by a scan signal and a gray scale level voltage signal, corresponding to pixel data, is applied to the display device element 963. The display device element 963 then is changed in luminance in response to the gray scale voltage signal, thus displaying an image. Each image equivalent data is re-written in each frame period, which is usually ca. 0.017 sec, for 60 Hz driving. Each scan line 961 sequentially selects pixel rows (lines) to turn on the pixel switches 964. During the time the pixel rows are selected, the gray scale voltage signals are supplied from the data lines 962 via the pixel switches 964 to the display device elements 963. There are cases where a plurality of pixels is simultaneously selected by scan lines or the driving is performed by a frame frequency higher than 60 Hz.
Referring to FIGS. 12A and 12B, a liquid crystal display device has a display panel 960 including a semiconductor substrate and an opposite substrate. The semiconductor substrate has a matrix array of pixel switches 964, as a unit pixel, and transparent electrodes 973. The opposite substrate has a single transparent electrode 974 extending on its entire surface. These substrates are mounted facing each other with a gap, in which a liquid crystal material is sealed. The display element 963, forming a unit pixel, includes a pixel electrode 973, an opposite substrate electrode 974, a liquid crystal capacitance 971 and an auxiliary capacitance 972. A backlight is provided as a light source on a back side of the display device panel.
When the pixel switch 964 is turned on by a scan signal from the scan line 961, the gray scale voltage signal from the data line 962 is applied to the pixel electrode 973. The transmittance of the backlight, transmitted through the liquid crystal, is changed due to the potential difference between each pixel electrode 973 and the opposite substrate 974. The potential difference is held by the liquid crystal capacitance 971 and by the auxiliary capacitance 972, for a specified time, even after the pixel witch 964 is turned off, thus providing for display. In driving the liquid crystal display device, the voltage polarity is reversed between plus and minus polarities, with respect to the common voltage of the opposite electrode 974, usually every frame period (inverted driving), in order to prevent deterioration of liquid crystal. Hence, the data line 962 is also driven by dot inversion driving or column inversion driving. The dot inversion driving is a driving method in which a voltage polarity applied to the liquid crystal is changed in every pixel, whereas the column inversion driving is a driving method in which the voltage polarity is changed in every frame.
In the organic light emitting diode display device, shown in FIGS. 12A and 12C, the display device panel 960 includes a semiconductor substrate on which a matrix array of a plurality of unit pixels are arranged. Each of these unit pixels comprises a pixel switch 964, an organic light emitting diode 982 and a thin film transistor (TFT) 981. The organic light emitting diode is formed by an organic film sandwiched between two thin film electrode layers. The TFT 981 controls a current supplied to the organic light emitting diode 982. The organic light emitting diode 982 and the TFT 981 are connected in series with each other between power supply terminals 984 and 985 supplied with different power supply voltages. An auxiliary capacitance 983 holds a control terminal voltage of the TFT 981. The display device element 963, associated with a pixel, includes the TFT 981, organic light emitting diode 982, power supply terminals 984, 985 and the auxiliary capacitance 983.
When the pixel switch 964 is turned on (made electrically conductive) by the scan signal from the scan line 961, the gray scale voltage signal from the data line 962 is applied to the control terminal of the TFT 981. This causes light to be emitted from the organic light emitting diode 982 with the luminance corresponding to the current controlled by TFT 981 to make necessary display. Light emission is sustained even after the pixel switch 964 is turned off (made electrically non-conductive), since the gray scale voltage signal applied to the control terminal of the TFT 981 is kept for a certain time by the auxiliary capacitance 983. In FIG. 30C, the pixel switch 964 and the TFT 981 formed by n-channel transistors are shown as an example. The TFT 981 may, however, be formed by a p-channel transistor. An organic light emitting diode may also be connected to the side the power supply terminal 984. In the driving of the organic light emitting diode display device, no inverted driving, such as is used in the liquid crystal display device, need be used.
The above describes the configuration of an organic light emitting diode display device in which display is made in association with a gray scale voltage signal applied to a device element from the data line 962, but there is another configuration in which the display device receives a gray scale current signal output from the data driver to make display. However, the description of the present invention will be made only with reference to the configuration in which the display device receives a gray scale voltage output from the data driver to make display.
Referring to FIG. 12A, it suffices that the gate driver 970 is adapted to supply a scan signal which is at least a binary signal. On the other hand, the data driver 980 has to drive each data line 962 with multi-level gray scale voltage signals matched to the number of gray scales. Therefore, the data driver 980 includes a digital to analog converter (DAC) circuit that includes a decoder which converts image data into a gray scale voltage signal and an amplifier which amplifies and outputs the gray scale voltage signal to the data line 962.
For high-end use mobile equipments, notebook PCs, monitors or TV receivers, having thin type display devices, such as liquid crystal display devices or organic light emitting diode display devices, the tendency is towards a high image quality or a multiple colors and the demand for multi-bit video digital data is increasing. Multi-bit DAC area is dependent on the decoder configuration.
Furthermore, in the liquid crystal display device, there is a demand for lowering of a power supply voltage used to drive a liquid crystal. On the other hand, in the OLED (organic light emitting diode) display device, polarity inversion as in liquid crystal driving is not necessary, and its dynamic range is wide for a given power supply voltage. In order to realize these, in both the liquid crystal display device and the organic light emitting diode display device, in the data driver 980, as switches of a level voltage selection circuit (decoder), a configuration is necessary in which a Pch transistor switch (Pch-SW) and an Nch transistor switch (Nch-SW) are combined, (a CMOS switch configuration wherein the Pch-SW and Nch-SW are connected in parallel, in order for currents between drain and source of the Pch-SW and Nch-SW to flow in the same direction, and have respective gates supplied with normal and complementary control signals to be controlled in common to be tuned on and off).
However, use of the CMOS switch increases the decoder area and driver cost.
It is to be noted that Patent Document 1 discloses a configuration in which, in a decoder circuit that decodes multi-bit digital data and outputs an electrical signal (voltage) corresponding to the multi-bit digital data, as a configuration where size is reduced in a longitudinal direction in which output candidate reference voltages are arrayed, without increasing size in a lateral direction, there is provided a plurality of first stage sub-decoder circuits (FSD0-FSD31) arranged for a plurality of adjacently disposed output candidates (V0-V63), each including unit decoders (SWE, SWO) disposed in parallel in a direction perpendicular to an array direction of the output candidates. In the disclosure of Patent Document 1, the size in the longitudinal direction of the decoder is reduced, but problems and ways for solving the problems are completely different from the present disclosure.    [Patent Document 1] JP Patent Kokai Publication No. JP-P2007-279367A